Freelancer Verilog / VHDL Designers Egypt MOHAMED A. The most commonly used linear function of single bits is exclusive-or (XOR). Figure 1 is an Linear Feedback Shift Register (LFSR) implementation of.
3+ years of experience in Xilinx ( Spartan/Artix/ Vertix /Zynq ) FPGAs prototyping using HDL (Verilog) across multiple design tools, (Xilinx ISE, Altera Quartus and Vivado )Įxpertise: RTL, FSM, synthesis, simulation using Isim and Modelsim, bitstream generation, timing/power/thermal analysis using Xilinx Power Estimator (XPE).Ģ years of experience in image processing hardware:Įxpertise: Convolutional neural networks, image encryption/decryption, recognition and a published paper.ġ year of experience in digital VLSI design in cadence:Įxpertise: Schematic design, SpectreS simulation, CMOS layout, Design Rule Checking (DRC), Layout versus Schematic (LVS), Parasitic extraction and Post layout simulation.Ħ months of experience in MIPS/ ARM assembly:Įxpertise: interrupt handlers, recursion, nested functions, stack management, link register, program counter and frame pointer. In computing, a linear-feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state. Cyclic Redundancy Code (CRC) is commonly used to determine the correctness of a.
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